Entropy Tool Details

Fitting into the Ecosystem
- Our tools plug into CAD flows with existing tools:     • Support Synopsys, Mentor, and Cadence dialects of Verilog     • Supported Tools: 
          ○ Synopsys DFT Compiler™ & Tetramax™ 
          ○ Mentor FastScan™ & ModelSim™
          ○ Cadence Conformal Verifier          ○ Same commands          ○ Same tool flow– Standard files (Verilog, Synopsys constraints, STIL,
  PrimeTime™ report, VCD waveforms, DVF waveforms, 
  DFTmax™ location files)

Synopsys Tetramax™ & DFTmax™ Constraint Language Parser
> Synopsys Tetramax™ & DFTmax™ Constraint Language Parser     - Commands to “black box” specified modules     - Tetramax™ add_net_connect and other directives to set signals> Delay and Technology Sensitive Logic Gate Replacement     - Redundancy remover & test point inserter replace logic   
       gates/flops with ones with same delay & library technology

Entropy Components
> Redundancy Remover (optional) – deletes/simplifies
   unnecessary logic caused by tied-off primary inputs or
   unused/undriven hardware> Synopsys constraint language parser> PRIMETIME path delay report parser       - Designer runs PrimeTime™ to get critical/near-critical
         paths       - Parses report & marks all of those paths as notouch       - No test hardware will be added to delay them> Test point inserter> Histogram creator> Statistical package – maintains P (0), P (1), Entropy, Activity,
   X/Z counts> Fault Loss Estimator        - Calculates the number of faults untested in circuit by
          forward/backwards netlist traversal using statistics       - Can also list specific lost faults by name       - Accurate to 10.8 % of fault coverage