Spectral presents its RTL entropy paper at ITC 2026
Spectral Chip Test attended the IEEE 2026 International Test Conference and successfully presented its paper on register-transfer-level test point insertion.
The paper, “Spectral-Entropy for Enhanced Testability and Efficient Scan Insertion at the RTL Level” by S. Kuttuva Ravikanth, A. Chatterjee and M. L. Bushnell, shows how test hardware can be added before logic synthesis, so the design flow avoids the 20 to 40 or more iterations that gate-level insertion causes.
We thank everyone who attended the session and stopped by to talk with us. The method is the basis of our upcoming RTL TPI product, and you can read about the mathematics behind it on our Technology page.
